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arm [2020/04/14 13:06] – niziakarm [2022/07/06 19:51] (current) – niziak
Line 8: Line 8:
   * **r13** sp Stack pointer   * **r13** sp Stack pointer
   * **r14** lr Link register Workspace    * **r14** lr Link register Workspace 
 +
 +====== xPSR ======
 +
 +Special-purpose program status registers (xPSR)
 +  * ''APSR'' Application PSR contains the condition code flags. Before entering an exception, the processor saves the condition code flags on the stack
 +  * ''IPSR'' Interrupt PSR contains the Interrupt Service Routine (ISR) number of the current exception activation.
 +  * ''EPSR'' Execution PSR contains the Thumb state bit (T-bit).
 +