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critical sections
When SD is used, critical section macro disables only part of IRQs:
Chain:
CRITICAL_REGION_ENTER
app_util_critical_region_enter(&__CR_NESTED);
(void) sd_nvic_critical_region_enter(p_nested);
Details:
CRITICAL_REGION_ENTER()
#ifdef SOFTDEVICE_PRESENT #define CRITICAL_REGION_ENTER() \ { \ uint8_t __CR_NESTED = 0; \ app_util_critical_region_enter(&__CR_NESTED); #else #define CRITICAL_REGION_ENTER() app_util_critical_region_enter(NULL) #endif
void app_util_critical_region_enter(uint8_t *p_nested) { #if __CORTEX_M == (0x04U) ASSERT(APP_LEVEL_PRIVILEGED == privilege_level_get()) #endif #if defined(SOFTDEVICE_PRESENT) /* return value can be safely ignored */ (void) sd_nvic_critical_region_enter(p_nested); #else app_util_disable_irq(); #endif }
__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) { int was_masked = __sd_nvic_irq_disable(); if (!nrf_nvic_state.__cr_flag) { nrf_nvic_state.__cr_flag = 1; nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 ); NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0; nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 ); NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1; *p_is_nested_critical_region = 0; } else { *p_is_nested_critical_region = 1; } if (!was_masked) { __sd_nvic_irq_enable(); } return NRF_SUCCESS; }
/**@brief Interrupts used by the SoftDevice, with IRQn in the range 0-31. */ #define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ (1U << POWER_CLOCK_IRQn) \ | (1U << RADIO_IRQn) \ | (1U << RTC0_IRQn) \ | (1U << TIMER0_IRQn) \ | (1U << RNG_IRQn) \ | (1U << ECB_IRQn) \ | (1U << CCM_AAR_IRQn) \ | (1U << TEMP_IRQn) \ | (1U << __NRF_NVIC_NVMC_IRQn) \ | (1U << (uint32_t)SWI5_IRQn) \ ))